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© All Rights Reserved. ApplyBlast.com
Rambus
Rambus is looking for an MTS Layout Design engineer to own chip‑level layout tasks for memory‑interface products, collaborating with designers worldwide and reporting to the layout manager. The role involves using Cadence Virtuoso and Calibre tools to create and verify layouts, address reliability issues, and ensure high‑performance design standards.
Headquarters
San Jose, California, United States
Company Size
501-1000 employees
Founded
1990
Rambus is a semiconductor and IP company that designs high-performance memory interface chips, interface IP (PHYs/SerDes) and hardware security IP. It licenses silicon IP and supplies semiconductor devices and reference designs used by SoC vendors and system manufacturers to accelerate memory, networking and interface functions across data center, AI, cloud, mobile and automotive markets. Rambus focuses on secure, high-bandwidth, low-latency solutions — including DDR/LPDDR/DDR5/DDR6 controllers and PHYs, high-speed SerDes, and root-of-trust/crypto building blocks — and supports customers with integration, verification and ecosystem partnerships.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Rambus.
Rambus didn’t post a salary, so this is our estimate from similar listings.
29% below the average for this role