Altera
A Physical Design Engineer at an ASIC/firmware firm specializes in implementing custom IP and System-on-Chip designs from RTL to GDS. The role encompasses conducting the full physical design flow, including synthesis, timing closure, power integrity, and layout verification to optimize product parameters like power and frequency for manufacturing readiness.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.