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Principal Advanced Packaging Engineer at Astera Labs - ApplyBlast

Principal Advanced Packaging Engineer

Astera Labs

1 month ago

4.3 on Glassdoor

Taipei, Taiwan

Onsite

Full Time

Senior

0 applicants

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About this role

Astera Labs is seeking a Principal Advanced Packaging Engineer to lead R&D for next-generation packaging technologies for optical chips. This senior individual contributor role focuses on setting technical direction and driving packaging technology development for NPO and CPO products. The position involves defining process flows, optimizing integration efforts, and ensuring yield and reliability for advanced packaging solutions.

Responsibilities

Lead R&D for advanced packaging of optical chips
Define and optimize wafer-level packaging process flows
Drive EIC-to-PIC integration and optical device integration

Skills

Qualifications

B.S. in Electrical EngineeringM.S. in Electrical EngineeringPh.D. in Electrical EngineeringB.S. in Materials ScienceM.S. in Materials Science

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

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Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.