Principal, ASIC Physical Design

Ayar Labs is seeking a Principal ASIC Physical Design Engineer to lead the end-to-end implementation of complex SoCs integrating high-speed digital, custom, and photonic components. The role focuses on synthesis, place-and-route, timing closure, and physical verification for mixed-signal designs in leading-edge process nodes. This position requires driving design methodologies and coordinating activities across multiple designers to support next-generation AI scale-up architectures.