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Principal Digital Design Engineer at Renesas 瑞萨电子 - ApplyBlast

Principal Digital Design Engineer

Renesas 瑞萨电子

5 months ago

Remote

Full Time

Senior

0 applicants

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About this role

Principal IC Design Engineer (RTL Design) at Renesas India, leading complex RTL design efforts for MCU SoCs, ensuring compliance with performance, power, and area (PPA) targets, and mentoring junior engineers.

Responsibilities

Lead RTL design and development of complex IPs and subsystems within MCU SoCs, ensuring compliance with performance, power, and area (PPA) targets
Drive micro-architecture definition and high-level digital design for assigned blocks
Support SoC integration, delivering high-quality subsystem views and documentation to Back-end and Design Verification teams
Own design quality checks, including lint, CDC, and RDC, and actively support functional verification of assigned blocks
Collaborate closely with system architects, verification engineers, physical design teams, and software teams to define specifications and ensure seamless end-to-end integration

Skills

Qualifications

Bachelor’s degree in Electronics & Communication Engineering, Electrical Engineering, Computer Engineering, or related technical fieldMinimum of 15 years of hands-on experience in digital IC/ASIC design, with a strong track record of delivering high-quality siliconStrong expertise in RTL design using Verilog/VHDLSolid understanding of digital design principles, timing analysis, clocking, resets, and verification methodologiesExperience using industry-standard EDA tools for synthesis, simulation, and static timing analysis