Staff Digital Design Engineer

Innatera

2 months ago

United Kingdom

Hybrid

Full Time

Senior

1 applicant

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About this role

The Staff Digital Design Engineer at Innatera is responsible for architecting, designing, and implementing digital IP blocks and subsystems for neuromorphic SoCs. This role involves translating high-level requirements into RTL specifications using SystemVerilog/Verilog, as well as collaborating with verification and backend teams to ensure alignment with design intent. The engineer will also optimize power, performance, and area goals, develop automation scripts, and mentor junior engineers, all while driving innovation in the semiconductor industry for advanced AI applications.

Skills

Qualifications

6+ years of hands-on ASIC digital design experienceStrong expertise in front-end digital design, including Verilog/SystemVerilog RTL development and debuggingSolid understanding of SoC architecture, bus interfaces, and IP integration flowsExperience performing synthesis and static timing analysis (STA) and defining timing constraintsProven experience with Cadence tools and industry-standard EDA flows

About Innatera

innatera.com

Innatera is a technology company specializing in ultra-low power neuromorphic processors that enable advanced pattern recognition for sensor applications. Their innovative Spiking Neural Processor mimics brain-like processing mechanisms, allowing for efficient and rapid data interpretation with minimal energy consumption. By leveraging proprietary analog-mixed signal computing architecture, Innatera's solutions provide significant improvements in latency and privacy for various industrial applications. The company is committed to pushing the boundaries of sensing technology, enhancing the capabilities of devices in power-limited environments.