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Principal SerDes Bring‑up Validation Engineer (2026-376) at Astera Labs - ApplyBlast

Principal SerDes Bring‑up Validation Engineer (2026-376)

Astera Labs

3 months ago

4.3 on Glassdoor

San Jose, California, United States

Onsite

Full Time

Senior

0 applicants

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About this role

Astera Labs is looking for a Principal SerDes Bring‑up Validation Engineer to lead end‑to‑end post‑silicon bring‑up, validation, and characterization of high‑speed connectivity solutions. The role involves designing and executing bring‑up plans, building automation frameworks, debugging system performance, and collaborating with design, firmware, and system teams to ensure silicon meets specifications.

Responsibilities

Design and execute post‑silicon bring‑up and validation plans
Develop and maintain automated test frameworks and data analysis pipelines
Lead cross‑functional debugging and root‑cause analysis of high‑speed interfaces

Skills

Qualifications

Bachelor's degree in Electrical Engineering or related fieldMaster's degree in Electrical Engineering or related fieldPhD in Electrical Engineering or related field

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

View Profile

Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.