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Principal SoC Physical Implementation/STA Engineer at NXP Semiconductors - ApplyBlast

Principal SoC Physical Implementation/STA Engineer

NXP Semiconductors

3 months ago

4.0 on Glassdoor

Bangalore, India

Onsite

Full Time

Senior

0 applicants

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About this role

An experienced Static Timing Analysis (STA) Lead with over 12 years of experience in SoC and block-level timing analysis. The role involves developing multi-mode timing constraints, performing exhaustive signoff across PVT corners, and driving timing closure through ECOs. This position requires leading a team of STA engineers while collaborating with architects, front-end, DFT, and physical design teams to ensure robust timing integration.

Responsibilities

Create and validate Synopsys Design Constraints for block and full-chip levels
Perform exhaustive timing analysis across multiple process, voltage, and temperature corners
Debug and resolve setup, hold, and transition timing violations
Drive timing closure by generating and evaluating engineering change orders
Lead a team of STA engineers and collaborate with cross-functional design teams