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Senior DFT Engineer at Astera Labs - ApplyBlast

Senior DFT Engineer

Astera Labs

2 months ago

4.3 on Glassdoor

Bengaluru, Karnataka, India

Onsite

Full Time

Senior

0 applicants

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About this role

The Senior DFT Engineer will design, implement, and validate design‑for‑test solutions for complex SoCs, collaborating with RTL, physical design, verification, and product engineering teams to ensure high test coverage and silicon reliability. The role involves developing DFT architectures, integrating DFT logic, generating ATPG patterns, analyzing coverage, and supporting silicon validation and yield improvement.

Responsibilities

Develop and implement DFT architecture for complex SoCs
Generate and validate ATPG patterns and analyze test coverage
Collaborate with cross‑functional teams for silicon validation and yield improvement

Skills

Qualifications

Bachelor's degree in Electronics, Electrical Engineering, Computer Engineering or related fieldMaster's degree in Electronics, Electrical Engineering, Computer Engineering or related field

About Astera Labs

asteralabs.com

Headquarters

Santa Clara, California, United States

Company Size

201-500 employees

Founded

2017

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Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.