Renesas 瑞萨电子
The Senior Package Design Engineer role focuses on advancing technological innovation in semiconductor package assembly, particularly for next-generation packaging technologies like PowerQFN, Flip-Chip, and SiP. The position involves designing and developing package and interconnect methods for AI/HPC, VPD, and other high-demand markets while collaborating with cross-functional teams to optimize processes and ensure smooth production transitions. This role requires expertise in advanced packaging technologies and strong analytical skills to address customer needs and drive business growth.
作为全球领先的微控制器、模拟功率器件和SoC产品供应商,瑞萨电子通过提供可靠的创新嵌入式设计,与您共创无限未来。
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
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and employee contacts for Renesas 瑞萨电子.
Renesas 瑞萨电子 didn’t post a salary, so this is our estimate from similar listings.
30% below the average for this role