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© All Rights Reserved. ApplyBlast.com
Altera
Altera is seeking a Senior Physical Design Engineer to lead the implementation of custom IP and SoC designs from RTL through GDSII, handling physical implementation, timing closure, power optimization, and design sign‑off for next‑generation FPGA products. The role involves close collaboration with RTL designers, verification, DFT, timing, and CAD teams to deliver high‑quality silicon and improve design methodologies.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
6% below the average for this role