Senior Staff Design Verification Engineer

The Senior Staff Design Verification Engineer is a senior technical contributor within the Smart Analog and Sensors team, responsible for delivering high-quality verification solutions for complex System-on-Chip (SoC) products. This role drives verification planning, methodology development, testbench architecture, functional validation, and debug activities across multiple subsystems and full-chip designs. The engineer collaborates closely with architecture, RTL, design, and system teams to ensure robust silicon quality and successful product execution.