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© All Rights Reserved. ApplyBlast.com
Hewlett Packard Enterprise
An ASIC Verification Engineer at HPE designs and maintains verification environments for chip designs using SystemVerilog and UVM. The role involves creating comprehensive test suites, performing functional verification with industry-standard simulators, and driving projects to tape-out signoff. Candidates will collaborate with RTL designers and software teams to debug design issues and enhance verification infrastructure.
Headquarters
The Woodlands, Texas, United States
Company Size
10001+ employees
Founded
1939
Discover HPE edge-to-cloud, enterprise compute IT, data, and security solutions. Learn how HPE empowers digital transformation through AI and sustainability.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Hewlett Packard Enterprise.
27% below the average for this role
Hewlett Packard Enterprise Announces $2 Billion Debt Offering
17 hours ago
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