Senior Staff Engineer, ASIC Design/Implementation - LEC/STA/Power Analysis

Marvell is seeking a Timing/STA Engineer to develop and validate timing constraints for complex SoC designs within the Photonic Fabric team. This role involves collaborating with cross-functional teams to define signoff methodologies, perform static timing analysis using industry-standard tools, and automate STA flows. The ideal candidate will drive timing closure for high-speed designs in advanced technology nodes to support next-generation AI and data center infrastructure.