SoC Static Timing Analysis (STA) Engineer, HBM

The SoC Static Timing Analysis (STA) Engineer, HBM role within Micron's Heterogeneous Integration Group focuses on owning chip-level timing sign-off for next-generation High Bandwidth Memory solutions. This senior technical position ensures timing integrity and drives closure across all modes and corners from initial design through tape-out. The engineer collaborates with cross-functional teams to develop timing methodologies, automate flows, and correlate pre- and post-silicon performance.