Staff Engineer, STA and Synthesis

The Staff Engineer, STA and Synthesis role at Renesas focuses on ensuring robust timing closure and signoff readiness for block- and full-chip designs across all modes and corners. This position involves developing and validating timing constraints, performing detailed setup/hold and variation-aware analysis, and collaborating with cross-functional teams to debug violations and drive ECO-based optimizations. The role supports timing signoff for pre-layout and post-layout stages while communicating closure status to project stakeholders.