Celero Inc
Celero Communications is seeking an ASIC Design Engineer to develop high-performance digital circuits and ASIC blocks for optical communication systems, integrating DSP, high-speed SerDes, and analog functionalities. The role involves collaborating with cross‑functional teams to design, verify, and bring ASICs from architecture through silicon validation.
Celero Inc.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Celero Inc.
Celero Inc didn’t post a salary, so this is our estimate from similar listings.
22% below the average for this role
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