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© All Rights Reserved. ApplyBlast.com
Hewlett Packard Enterprise
This onsite role focuses on architecting and developing block-level, subsystem, and full-chip verification environments for high-performance ASICs using SystemVerilog and UVM. The engineer will define verification suites, conduct gate-level simulation analysis for tape-out readiness, and collaborate with logic designers to resolve bugs and support software validation.
Headquarters
The Woodlands, Texas, United States
Company Size
10001+ employees
Founded
1939
Discover HPE edge-to-cloud, enterprise compute IT, data, and security solutions. Learn how HPE empowers digital transformation through AI and sustainability.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Hewlett Packard Enterprise.
Hewlett Packard Enterprise didn’t post a salary, so this is our estimate from similar listings.
15% above the average for this role
Hewlett Packard Enterprise Announces $2 Billion Debt Offering
17 hours ago
