Physical Design Backend STA Engineer

A Static Timing Analysis (STA) Physical Design Engineer at NVIDIA's Networking team in Israel focuses on enabling high-speed, low-latency communication devices by ensuring timing convergence and quality across chiplet and package levels. The role contributes to industry-leading physical design efforts within a collaborative engineering environment and supports delivery from pre-layout models through signoff. This position is embedded in a fast-paced, innovative semiconductor team where individual contributions impact product performance.