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© All Rights Reserved. ApplyBlast.com
Altera
A Physical Design Engineer at Altera works on backend implementation flows for FPGA/SoC devices, taking designs from RTL/netlist through GDSII/tape-out with an emphasis on meeting performance, power, and area goals. The role requires collaboration across architecture, logic design, DFT, CAD/EDA, and manufacturing teams and focuses on programmable logic structures and full-chip integration.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
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