Senior Design Verification Engineer

SiFive is seeking a Senior Design Verification Engineer to own block- and subsystem-level design verification for advanced out-of-order CPU cores. The role involves collaborating with micro-architects and RTL designers to verify complex execution pipelines, memory systems, and coherence protocols using modern, coverage-driven methodologies. This position requires strong expertise in SystemVerilog/UVM and a deep understanding of CPU micro-architecture to ensure high-performance and data-intensive applications.