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Astera Labs
Astera Labs is seeking a Tech Lead Design Engineer to architect and deliver connectivity silicon for large AI clusters. The role involves owning RTL design, collaborating with architecture, verification, DFT, and physical design teams, and providing technical leadership and mentorship to ensure successful silicon delivery.
Headquarters
Santa Clara, California, United States
Company Size
201-500 employees
Founded
2017
Astera Labs is a semiconductor company that builds purpose‑built connectivity silicon and system solutions for rack‑scale AI and modern data centers. They design high‑speed retimers, PHY/connectivity devices, interposers and companion firmware/software that extend signal reach, improve link reliability, and enable PCIe/CXL and other accelerator interconnects across cables and backplanes. Astera’s products add telemetry, error monitoring and management features to simplify integration for OEMs, cloud providers and hyperscalers. The company focuses on enabling scalable, low‑latency multi‑node AI training and inference systems.
Headquarters
San Francisco, CA
Company Size
201-500 employees
Founded
2018
Industry
Technology
Glassdoor Rating
4.2 / 5
Sarah Johnson
Chief Executive Officer
Michael Chen
Chief Technology Officer
Emily Williams
VP of Engineering
David Rodriguez
VP of Product
Jessica Thompson
Chief Financial Officer
Andrew Park
VP of Sales
View leadership team, funding history,
and employee contacts for Astera Labs.
9% below the average for this role
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