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© All Rights Reserved. ApplyBlast.com
Altera
Altera is seeking a Senior Manager, Static Timing Analysis to lead a team responsible for timing closure and signoff of advanced FPGA and ASIC designs. This role involves driving methodology, collaborating across design and implementation teams, and ensuring high-performance, power-efficient silicon delivery. The ideal candidate possesses deep STA expertise and strong leadership experience to manage complex engineering programs.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
5% below the average for this role
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