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© All Rights Reserved. ApplyBlast.com
Altera
An experienced IP Verification Engineer ensures the functional correctness and quality of IP blocks for complex SoCs and FPGAs by collaborating with architecture, design, and validation teams. This role involves developing robust verification environments using SystemVerilog and UVM, creating comprehensive test plans, and utilizing formal verification methods to drive coverage closure. The engineer will also build automation infrastructure and debug complex issues to achieve first-pass success in semiconductor design.
Headquarters
San Jose, California, United States
Company Size
1001-5000 employees
Founded
1983
Altera empowers innovators with scalable FPGA and SoC solutions, spanning high-performance to power- and cost-optimized devices. These devices are designed for cloud, network, and edge applications, enabling flexible acceleration and deployment. The company positions itself as a catalyst for innovation, providing adaptable hardware platforms for diverse workloads. Altera’s mission is to accelerate innovators by delivering versatile programmable logic solutions.
256% above the average for this role