(Sr.) Staff Package Design Engineer - MIS substrate/FC expose die (Experienced in Power or Gan is requried)

The (Sr.) Staff Package Design Engineer will design and develop package and interconnect methods for Renesas's packaging needs, focusing on Power SiP/modules, wafer level, flip-chip, and GaN-related packaging. This role involves qualifying package technologies for consumer, industrial, and automotive power applications while working with subcontractors to optimize processes and ensure superior quality. The position requires strong analytical skills and expertise in power packaging methods to support business growth and production ramp-up.